A developer designed an Ethernet chip in four days and added a counter for the universe’s lifetime

Julia Desmazes had four days to design a chip and still found room to account for the heat death of the universe. Expresso combines a useful Ethernet switch with a counter whose intended lifetime makes the manufacturing schedule look slightly rushed. Nothing says sensible project scope like budgeting beyond the stars.

In her November 9 build account, Desmazes describes an unexpected free fabrication opportunity after an earlier switch tapeout. The catch was a 96-hour deadline. She expanded existing networking work into a full-chip design and used remaining area for the extraordinarily patient beacon.

The submitted design contains a four-port 100Mbps switch. Its counter is designed not to overflow for 10^100 years. Those are design claims from the maker’s account, rather than a measurement of working returned silicon. The universe has also declined to make itself available for a full-duration endurance test (poor scheduling).

The distinction matters because a tapeout is a major achievement and still leaves physical work ahead. A design sent to fabrication hasn’t automatically survived packaging, power-up or the discovery that the real board behaves differently from the simulated one. The completed layout marks a milestone, with packaging and live network tests still ahead of it.

The post spends time on the less photogenic parts of making a chip, including how a design becomes something that can connect to a board. That is useful context for anyone whose picture of semiconductor work jumps straight from a circuit diagram to a neat black package. The package is another project, with its own decisions and places to get stuck.

The absurd counter makes unused silicon area tangible. On a fixed opportunity, some constraints are about filling available space and meeting the shuttle, rather than making every feature justify a retail product roadmap. The spare room can become a joke you can inspect, provided it doesn’t displace the practical job the chip was meant to do.

For another maker, the reusable lesson is much less cosmic. Starting with a functioning design concept can make a short opportunity reachable, but every expansion adds something else to validate. The ordinary packet handling needs ordinary, repeatable tests before the beacon gets invited to explain how long ordinary is supposed to last.

The first useful result from a personal chip project is often the account of how it got through the practical obstacles. Working silicon would add another chapter; a timer with an almost unpronounceable lifetime already supplies an unusually long bookmark.

That timeout is going to take a while.